1. Field
This invention relates to data analysis schemes for use in a multichannel digital tape recorder.
2. Background of the Invention
The present invention involves apparatus for performing digital recording of analog information and is particularly suited to reproduction of audio information. Apparatus and a method for providing a faithful information reproduction was disclosed in an earlier United States Patent entitled, "Apparatus and Method For Providing Error Recognition and Correction of Recorded Digital Information", invented by one of the present inventors, U.S. Pat. No. 4,202,018 issued May 6, 1980 and the original application that this application is a divisional application of has issued as a patent entitled "Apparatus and Improved Method For Processing of Digital Information", U.S. Pat. No. 4,328,580 issued May, 1982. The present invention preferably utilizes certain of the circuitry and error detection/correction techniques disclosed in these United States Patents.
3. Prior Art
As detailed in the above-cited earlier United States Patents, there are numerous advantages to reproducing audio information in a digital form. The present invention preferably incorporates a full reproduction of primary data on a backup track, and recognizes that such exact reproduction and substitution, where appropriate, of backup for primary data on discovery of an error, is not in itself new. Such is well known in the art and is known in patents by Dirks, U.S. Pat. No. 3,281,804, Hendrichs, et al., U.S. Pat. No. 3,665,430 and Gabor U.S. Pat. No. 3,264,623. The present invention includes a new synchronization code format and a system for more rapidly and accurately locating and locking onto synchronization coding to prevent a premature declaration of synchronization, particularly upon startup which arrangement is believed to be unique.
It is, therefore, a principal object of the present invention to provide circuitry for rapidly acquiring synchronization, particularly at startup, that includes an arrangement wherein acquired synchronization codes and the spacing therebetween are checked for a number of data groups or words before synchronization is declared.
In accordance with the above object, with a use of alternating synchronization coding, the present invention, to lock onto proper spacing between data words as soon as possible during playback, provides synchronization engine circuitry. This circuitry can be described as operating in essentially four states and is particularly useful at startup, to locate synchronization codes and spacing therebetween in the data flows. In operation, the synchronization engine looks in a data flow at startup for any sync code and, when such sync code is found, counts ahead to where the next sync code should be. If a proper sync code is found, again the circuitry counts ahead to where the next sync code should be, continuing looking at point along the data flow until a certain number (n) of properly located sync codes are discovered whereat synchronization is declared and normal playback is ordered. However, if sync codes are not located where they should be in the data flow, then such failures are subtracted from succeses until either (n) successes are found or a total of successes less failures reaches zero whereat the circuitry returns to the first state of looking for any sync code. This circuitry and its functioning provides for a more positive location of synchronization within the shortest period of time possible so as to prevent declaring synchronization prematurely and creating thereby unwanted noise.